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CY28551-3
....................Document #: 001-05677 Rev. *D Page 10 of 28
Byte 10: Control Register 10
Bit
@Pup
Type
Name
Description
7
0
R/W
DF1_N7
The DF1_N[8:0] will be used to configure CPU frequency for Dynamic
Frequency. DOC[1:2] =01.
60
R/W
DF1_N6
50
R/W
DF1_N5
40
R/W
DF1_N4
30
R/W
DF1_N3
20
R/W
DF1_N2
10
R/W
DF1_N1
00
R/W
DF1_N0
Byte 11: Control Register 11
Bit
@Pup
Type
Name
Description
7
0
R/W
DF2_N7
The DF2_N[8:0] will be used to configure CPU frequency for Dynamic
Frequency. DOC[1:2] =10
60
R/W
DF2_N6
50
R/W
DF2_N5
40
R/W
DF2_N4
30
R/W
DF2_N3
20
R/W
DF2_N2
10
R/W
DF2_N1
00
R/W
DF2_N0
Byte 12: Control Register 12
Bit
@Pup
Type
Name
Description
7
0
R/W
DF3_N7
The DF3_N[8:0] will be used to configure CPU frequency for Dynamic
Frequency. DOC[1:2] =11
6
0
R/W
DF3_N6
5
0
R/W
DF3_N5
4
0
R/W
DF3_N4
3
0
R/W
DF3_N3
2
0
R/W
DF3_N2
1
0
R/W
DF3_N1
0
R/W
DF3_N0
Byte 13: Control Register 13
Bit
@Pup
Type
Name
Description
7
0
R/W
Recovery_Frequency This bit allows selection of the frequency setting that the clock will be
restored to once the system is rebooted
0: Use HW settings, 1: Recovery N[8:0]
6
0
R/W
Timer_SEL
Timer_SEL selects the WD reset function at the SRESET pin when WD
times out.
0 = Reset and Reload Recovery_Frequency
1 = Only Reset
5
1
R/W
Time_Scale
Time_Scale allows selection of WD time scale
0 = 294 ms
1 = 2.34 s
4
0
R/W
WD_Alarm
WD_Alarm is set to “1” when the watchdog times out. It is reset to “0” when
the system clears the WD_TIMER time stamp.
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